12.16.2 D.2. Cellular arrays, etc

Chapter Contents (Back)

Stout, Q.F.,
An Algorithmic Comparison Of Meshes And Pyramids,
EMIP(87), pp. 107-121. BibRef

Uhr, L.,
Multiple-Image And Multimodal Augmented Pyramid Computers,
ILIP(87), pp. 131-147. BibRef

Stout, Q.F.,
Algorithm-Guided Design Considerations For Meshes And Pyramids,
ILIP(87), pp. 149-165. BibRef

Schaefer, D.H.,
Pyramid Architectures,
ILIP(87), pp. 167-179. BibRef

Schnorr, C.P., Shamir, A.,
An Optimal Sorting Algorithm For Mesh Connected Computers,
STOC(87), pp. 255-263. BibRef

Kosaraju, S.R., Atallah, M.J.,
Optimal Simulations Between Mesh-Connected Arrays Of Processors,
STOC(87), pp. 264-272. BibRef

Uhr, L.,
Parallel, Hierarchical Software/Hardware Pyramid Architectures,
PSCV(87), pp. 1-20. BibRef

Cantoni, V., hierarchical systems: architectural features, I.P.,
PSCV(87), pp. 21-30. BibRef

Fritsch, G.,
General Purpose Pyramidal Architectures,
PSCV(87), pp. 41-58. BibRef

Duff, M.J.B.,
Pyramids-Expected Performance,
PSCV(87), pp. 59-73. BibRef

Stout, Q.F.,
Hypercubes And Pyramids,
PSCV(87), pp. 75-89. BibRef

Merigot, A., Clermont, P., Mehat, J., Devos, F., Zavidovique, B.,
A Pyramidal System For Image Processing,
PSCV(87), pp. 109-124. BibRef

Schaefer, D.H., Ho, P.,
Counting On The Gam Pyramid,
PSCV(87), pp. 125-131. BibRef

Burt, P.J., Anderson, C.H., Sinniger, J.O., van der Wal, G.,
A Pipelined Pyramid Machine,
PSCV(87), pp. 133-152. BibRef

Gerardi, G.,
The Papia Controller: Hardware Implementation,
PSCV(87), pp. 153-163. BibRef

Peleg, S., Federbusch, O.,
Custom Made Pyramids,
PSCV(87), pp. 165-171. BibRef

Tanimoto, S.L.,
Paradigms For Pyramid Machine Algorithms,
PSCV(87), pp. 173-194. BibRef

Reeves, A.P.,
Pyramid Algorithms On Processor Arrays,
PSCV(87), pp. 195-213. BibRef

Besslich, P.W.,
Pyramidal Transforms In Image Processing And Computer Vision,
PSCV(87), pp. 215-246. BibRef

Ferretti, M.,
Overlapping In Compact Pyramids,
PSCV(87), pp. 247-260. BibRef

Zimmer, H.G.,
Vectorial Features In Pyramidal Image Processing,
PSCV(87), pp. 299-310. BibRef

Di Gesu, V.,
A High Level Language For Pyramidal Architectures,
PSCV(87), pp. 329-339. BibRef

Maloberti, F.,
Silicon Implementation Of Multiprocessor Pyramid Architecture,
PSCV(87), pp. 357-372. BibRef

Negrini, R., Stefanelli, R.,
Fault-Tolerance Techniques In Arrays For Image Processing,
PSCV(87), pp. 373-392. BibRef

Burt, P.J., van der Wal, G.S.,
Iconic Image Analysis With The Pyramid Vision Machine,
CAPAMI(87), pp. 137-144. BibRef

Jrad, A.M., Hall, R.W.,
The Ofc Enhanced Mesh Architecture: A Performance Study,
CAPAMI(87), pp. 184-191. BibRef

Alnuweiri, H.M., Prasanna Kumar, V.K.,
Efficient Image Computations On Vlsi Architectures With Reduced Hardware,
CAPAMI(87), pp. 192-199. BibRef

Gacs, P.,
Reliable Computation With Cellular Automata,
J. COMPUTER & SYSTEM SCIENCES(32), 1986, pp. 15-78. BibRef

Culik II, K., Gruska, J., Salomaa, A.,
Systolic Trellis Automata: Stability, Decidability And Complexity,
IC(71), 1986, pp. 218-230. BibRef

Kunde, M.,
Lower Bounds For Sorting On Mesh-Connected Architectures,
ACTA INFORMATICA(24), 1987, pp. 121-130. BibRef

Buda, A.O.,
Multiprocessor Automata,
IPL(25), 1987, pp. 257-261. BibRef

Kobuchi, Y.,
A Note On Symmetrical Cellular Spaces,
IPL(25), 1987, pp. 413-415. BibRef

Miller, R., Stout, Q.F.,
Data Movement Techniques For The Pyramid Computer,
SIAM JC(16), 1987, pp. 38-60. BibRef

Ibarra, O.H., Jiang, T.,
On One-Way Cellular Arrays,
SIAM JC(16), 1987, pp. 1135-1154. BibRef

Sado, K., Igarashi, Y.,
Some Parallel Sorts On A Mesh-Connected Processor Array And Their Time Efficiency,
JPDC(3), 1986, pp. 398-410. BibRef

Stout, Q.F.,
Supporting Divide-And-Conquer Algorithms For Image Processing,
JPDC(4), 1987, pp. 95-115. BibRef

Prasanna Kumar, V.K., Raghavendra, C.S.,
Array Processor With Multiple Broadcasting,
JPDC(4), 1987, pp. 173-190. BibRef

Ibrahim, H.A.H., Kender, J.R., Shaw, D.E.,
Low-Level Image Analysis Tasks On Fine-Grained Tree-Structured Simd Machines,
JPDC(4), 1987, pp. 546-574. BibRef

Shaw, D.E.,
On The Range Of Applicability Of An Artificial Intelligence Machine,
AI(32), 1987, pp. 151-172. BibRef

Hwang, K., Ghosh, J.,
Hypernet: A Communication-Efficient Architecture For Constructing Massively Parallel Computers,
T-COMP(36), 1987, pp. 1450-1466. BibRef

Chapter on Rosenfeld Bibliography for 1987 continues in
D.3. Other systems .

Last update:Jun 7, 2018 at 10:14:50