3.13 A. Computational Techniques

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3.13.1 A.1. Architectures and environments

Chapter Contents (Back)

Miller, R., Stout, Q.F.,
Parallel Algorithms For Regular Architectures: Meshes And Pyramids, Mit Press, Cambridge,
MA 96(1996). BibRef

Maresca, M.,
Guest Ed., Special Issue On Parallel Architectures For Image Processing,
P-IEEE(84), No. 7, July 1996, pp. 915-1049. BibRef

Olson, T.J., Taylor, J.R., Lockwood, R.J.,
Programming A Pipelined Image Processor,
CVIU(64), 1996, pp. 351-367. BibRef

Leiserson, C.E., Abuhamdeh, Z.S., Douglas, D.C., Feynman, C.R., Gonmukhi, M.N., Hill, J.V., Hillis, W.D., Kuszmaul, B.C., Pierre, M.A.St., Wells, D.S., Wong-Chan, M.C., Yang, S.W., Zak, R.,
The Network Architecture Of The Connection Machine Cm-5,
JPDC(33), 1996, pp. 145-158. BibRef

Bader, D.A., JaJa, J.,
Parallel Algorithms For Image Histogramming And Connected Components With An Experimental Study,
JPDC(35), 1996, pp. 173-190. BibRef

Ng, C.K.Y., Pun, L.K.L., Ip, D.M.C., Hamdi, M., Ahmed, I.,
Embedding Pyramids Into 3d Meshes,
JPDC(36), 1996, pp. 173-184. BibRef

Baglietto, P., Maresca, M., Migliardi, M., Zingirian, N.,
Image Processing On High-Performance Risc Systems,
P-IEEE(84), 1996, pp. 907-930. BibRef

Wang, C.L., Bhat, P.B., Prasanna, V.K.,
High-Performance Computing For Vision,
P-IEEE(84), 1996, pp. 931-946. BibRef

Alexander, W.E., Reeves, D.S., Gloster Jr., C.S.,
Parallel Image Processing With The Block Data Parallel Architecture,
P-IEEE(84), 1996, pp. 947-968. BibRef

Krikelis, A., Lee, R.M.,
A Modular Massively Parallel Computing Approach To Image-Related Processing,
P-IEEE(84), 1996, pp. 988-1004. BibRef

Hammerstrom, D.W., Lulich, D.P.,
Image Processing Using One-Dimensional Processor Arrays,
P-IEEE(84), 1996, pp. 1005-1018. BibRef

Colaitis, M.J., Jumpertz, J.L., Guerin, B., Choron, B., Battini, F., DeLescure, B., Gautier, E., Geffroy, J.P.,
The Implementation Of P$^3$I, A Parallel Architecture For Video Real-Time Processing: A Case Study,
P-IEEE(84), 1996, pp. 1019-1037. BibRef

Wu, D.M., Guan, L.,
A Distributed Real-Time Image Processing System,
RTI(1), 1995, pp. 427-435. BibRef

Satou, T., Sakauchi, M.,
A Software Multimedia Platform With Real-Time Video Manipulation Capability,
RTI(2), 1996, pp. 153-162. BibRef

Kim, J., Kim, Y.,
Uwicl: A Multi-Layered Parallel Image Computing Library For Single-Chip Multiprocessor-Based Time-Critical Systems,
RTI(2), 1996, pp. 187-199. BibRef

Fong, A.Q., Kanji, A., de Gyvez, J.P.,
Time-Multiplexing Scheme For Cellular Neural Networks Based Image Processing,
RTI(2), 1996, pp. 231-239. BibRef

Wittenbrink, C.M., Somani, A.K., Chen, C.H.,
Cache Write Generate For Parallel Image Processing On Shared Memory Architectures,
T-IP(5), 1996, pp. 1204-1208. BibRef

Chien, S.A., Mortensen, H.B.,
Automating Image Processing For Scientific Data Analysis Of A Large Image Database,
T-PAMI(18), 1996, pp. 854-859. BibRef

Dolan, J., Kohl, C., Lerner, R., Mundy, J., Boult, T., Beveridge, J.R.,
Solving Diverse Image Understanding Problems Using The Image Understanding Environment,
IUW 96(1481-1504). BibRef

Shekhar, C., Kuttikkad, S., Chellappa, R.,
Knowledge-Based Integration Of Iu Algorithms,
IUW 96(1525-1532). BibRef

Du, F., Izatt, A., Bandera, C.,
An Mimd Computing Platform For A Hierarchical Foveal Machine Vision System,
CVPR 96(720-725). BibRef

Johnson, M.P.,
Automated Creation Of Visual Routines Using Genetic Programming,
ICPR(A), pp. 951-956. BibRef

de Boer, C., Smeulders, A.W.M.,
Bessi: An Experimentation System For Vision Module Evaluation,
ICPR(C), pp. 109-113. BibRef

Olk, J.G.E., Jonker, P.P.,
Bucket Processing: A Paradigm For Image Processing,
ICPR(D), pp. 386-390. BibRef

Yamashita, N., Fujita, Y., Okazaki, S.,
An Integrated Memory Array Processor With A Synchronous-Dram Interface For Real-Time Vision Applications,
ICPR(D), pp. 575-580. BibRef

Shekhar, C., Kuttikkad, S., Chellappa, R., Thonnat, M.,
Knowledge-Based Integration Of Iu Algorithms,
ICPR(D), pp. 599-605. BibRef

Ranganathan, N., Bhavanishankar, N., Vijaykrishnan, N.,
A Dynamic Frequency Linear Array Processor For Image Processing,
ICPR(D), pp. 611-615. BibRef

Cinque, L.,
A Parallel Partial-Sums Computation On A Pyramid Machine,
ICPR(D), pp. 616-619. BibRef

Biancardi, A., Merigot, A.,
Connected Component Support For Image Analysis Programs,
ICPR(D), pp. 620-624. BibRef

Nolle, M., Schreiber, G.,
Data Distribution Concepts For Parallel Image Processing,
ICPR(D), pp. 728-733. BibRef

Galinec, D., Dekeyser, J.L., Marquet, P.,
Mixed Synchronous-Asynchronous Approach For Real-Time Image Processing: A(N) Mpeg-Like Coder,
ICIP(B), pp. 121-124. BibRef

Spieth, M.R., Hulskamp, J.P.,
Parallel Image Processing On Single Processor Systems,
ICIP(B), pp. 133-136. BibRef

Sorel, Y.,
Real-Time Embedded Image Processing Applications Using The $A^3$ Methodology,
ICIP(B), pp. 145-148. BibRef

Sim, Y.S., Lim, C.S., Moon, Y.S., Park, S.H.,
Design And Implementation Of The Visual Programming Environment For (The) Distributed Image Processing,
ICIP(B), pp. 149-152. BibRef

Mou, Z.J.A., Rice, D.S., Ding, W.,
Vis-Based Native Video Processing On Ultrasparc,
ICIP(B), pp. 153-156. BibRef

Rhee, Y., Lee, J.,
Prefetching Scheme For Image Processing On Shared Memory Multiprocessors,
ICIP(B), pp. 157-160. BibRef

Chalermwat, P., Alexandridis, N., Piamsa-Nga, P., O'Connell, M.,
Parallel Image Processing In Heterogeneous Computing Network Systems,
ICIP(B), pp. 161-164. BibRef

Riocreux, P.A., Yates, R.B.,
Non-Synchronous Control Of Bit-Serial Video Signal Processor Array Architecture,
ICIP(B), pp. 165-168. BibRef

Vijaykrishnan, N., Ranganathan, N., Bhavanishankar, N.,
Dflap: A Dynamic Frequency Linear Array Processor,
ICIP(B), pp. 1007-1010. BibRef

Ruedi, P.F., Marchal, P.R., Arreguit, X.,
A Mixed Digital-Analog Simd Chip Tailored For Image Perception,
ICIP(B), pp. 1011-1014. BibRef

Melchert, W.,
Automatic Flow Control Planning For Real-Time Image Processing Devices,
ICIP(C), pp. 643-646. BibRef

Chapter on Rosenfeld Bibliography for 1996 continues in
A.1. Databases .

Last update:Jun 7, 2018 at 10:14:50