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| Algorithm Partition And Parallel Recognition Of General Context-Free Languages Using Fixed-Size | vlsi | Architecture |
| Algorithms And Parallel | vlsi | Architectures Ii (Bonas, France, June 2-6, 1991), North-Holland |
| Algorithms And Parallel | vlsi | Architectures, North-Holland |
| Algorithms For Routing And Testing Routability Of Planar | vlsi | Layouts |
| Analog | vlsi | Architectures For Motion Processing: From Fundamental Limits To System Applications |
| Analog | vlsi | Circuits For Stimulus Localization And Centroid Computation |
| Analog | vlsi | Implementation For Stereo Correspondence Between 2-D Images |
| Analog | vlsi | System For Stereoscopic Vision, Kluwer, Dordrecht, An |
| Analog | vlsi | Systems For Image Acquisition And Fast Early Vision Processing |
| Application Of Concurrent | vlsi | Systems To Two-Dimensional Signal Processing |
| Approximation Schemes For Covering And Packing Problems In Image Processing And | vlsi | |
| Architecture For Region Boundary Extraction In Raster Scan Images Suitable For | vlsi | Implementation, An |
| Area-Maximum Edge Length Tradeoff For | vlsi | Layout, An |
| Attribute Grammar For Shape Recognition And Its | vlsi | Implementation |
| Automatic Inspection Of | vlsi | Masks |
| Bit-Serial | vlsi | Architecture For Generating Moments In Real Time, A |
| Casm: A | vlsi | Chip For Approximate String Matching |
| Cellular Automaton Model For The Determination Of The Mean Velocity Of Moving Objects And Its | vlsi | Implementation, A |
| Cellular | vlsi | Architecture, A |
| Channel Routing In | vlsi | |
| Complexity Issues In | vlsi | : Optimal Layouts For The Shuffle-Exchange Graph And Other Networks, Mit Press, Cambridge |
| Complexity Of Minimizing Wire Lengths In | vlsi | Layouts, The |
| Computation Of Orientational Filters For Real-Timecomputer Vision Problems Iii: Steerable System And | vlsi | Architectures |
| Computing Motion Using Analog | vlsi | Vision Chips: An Experimental Comparison Among Different Approaches |
| Computing Motion Using Analog | vlsi | Vision Chips: An Experimental Comparison Among Four Approaches |
| Considerations On A | vlsi | Architecture For Cellular Logic Operations |
| Crs Image Processing Systems With | vlsi | Modules |
| Data-Driven | vlsi | Image Processor (Impp)-A Lsi Version Of Tip, A |
| Depth Perception Using Blurring And Its Application In | vlsi | Wafer Probing |
| Dynamic Wires: An Analog | vlsi | Model For Object-Based Processing |
| Efficient Embeddings Of Binary Trees In | vlsi | Arrays |
| Efficient Image Computations On | vlsi | Architectures With Reduced Hardware |
| Efficient Planar Embedding Of Trees For | vlsi | Layouts |
| Efficient Planar Embedding Of Trees For | vlsi | Layouts |
| Efficient | vlsi | Architecture For Template Matching Based On Moment Preserving Pattern Matching, An |
| Efficient | vlsi | Architecture With Applications To Geometric Problems, An |
| Embedding Ternary Trees In | vlsi | Arrays |
| Embedding Tree Structures In | vlsi | Hexagonal Arrays |
| Enhanced Mesh Connected | vlsi | Architecture For Parallel Image Processing, An |
| Estimating The Focus Of Expansion In Analog | vlsi | |
| Feasibility Of A | vlsi | Chip For Ray Tracing Bicubic Patches, The |
| Framework For Solving | vlsi | Graph Layout Problems, A |
| Geometrical Shape Recognition Using A Cellular Automaton Architecture And Its | vlsi | Implementation |
| Group Properties Of Cellular Automata And | vlsi | Applications |
| Guest Ed., Special Issue: | vlsi | And Parallel Computing For Pattern Recognition And Artificial Intelligence |
| Guest Ed., Special Issue: | vlsi | For Computer Vision |
| Image Computations On Reconfigurable | vlsi | Arrays |
| Line Extraction Method For Automated Sem Inspection Of | vlsi | Resist, A |
| Medium Level Scene Representation Using A | vlsi | Smart Hexagonal Sensor With Multiresolution Edge Extraction Capability And Scale Space Integration Processing |
| Mixed-Signal | vlsi | Architecture Forreal-Time Computer Vision |
| Monolithic Hough Transform Processor Based On Reconfigurable | vlsi | , A |
| New Programmable | vlsi | Architecture For Histogram And Statistics Computation In Different Windows, A |
| Object Recognition System Using Stochastic Knowledge Source And | vlsi | Parallel Architecture, An |
| On The Maximum Edge Length In | vlsi | Layouts Of Complete Binary Trees |
| On The Metric Approach To Pattern Recognition And Its | vlsi | Implementation |
| Optimal | vlsi | Graph Embeddings In Variable Aspect Ratio Rectangles |
| Parallel Bit-Level Pipelined | vlsi | Processing Unit For The Histogramming Operation |
| Parallel Image Transformation And Its | vlsi | Implementation |
| Parallel Parsing Algorithms And | vlsi | Implementations For Syntactic Pattern Recognition |
| Parallel Shape Recognition And Its Implementation On A Fixed-Size | vlsi | Architecture |
| Parallel Skeletonization Algorithm Based On Two-Dimensional Cellular Automata And Its | vlsi | Implementation, A |
| Parallel Sorting In Two-Dimensional | vlsi | Models Of Computation |
| Pipeline And Parallel-Pipeline Fft Processors For | vlsi | Implementations |
| Polymorphic Arrays: A Novel | vlsi | Layout For Systolic Computers |
| Polymorphic Arrays: A Novel | vlsi | Layout For Systolic Computers |
| Programmable | vlsi | Retina For Rough Vision, A |
| Real-Time Edge Detector: Algorithm And | vlsi | Architecture, A |
| Real-Time | vlsi | -Based Architecture For Multi-Motion Estimation, A |
| River Routing In | vlsi | |
| Rpct Algorithm And Its | vlsi | Implementation |
| Shape Recognition Using A Fixed-Size | vlsi | Architecture |
| Siba: A | vlsi | Systolic Array Chip For Image Processing |
| Smac: A | vlsi | Architecture For Scene Matching |
| Snap: A | vlsi | Architecture For Artificial Intelligence Processing |
| Solving Undirected Graph Problems On | vlsi | |
| Space-Time Domain Expansion Approach To | vlsi | And Its Application To Hierarchical Scene Matching |
| Space-Time Domain Expansion Approach To | vlsi | And Its Application To Hierarchical Scene Matching |
| Straight-Line Detection On A Gated-Connection | vlsi | Network |
| Synchronizing Large | vlsi | Processor Arrays |
| System-Level Design Of Specialized | vlsi | Hardware For Computing Relative Orientation |
| Systolic Array With Applications To Image Processing And Wire-Routing In | vlsi | Circuits, A |
| Texture Recognition Using A Superfast Cellular Neural Network | vlsi | Chip In A Real Experimental Environment |
| Three-Dimensional | vlsi | Architecture For Image Understanding |
| Time- And | vlsi | -Optimal Convex Hull Computation On Meshes With Multiple Broadcasting |
| Toward Color Image Segmentation In Analog | vlsi | : Algorithm And Hardware |
| Tree Matching Algorithm And | vlsi | Architecture For Real-Time 2d Object Classification, A |
| Vector Engine: A | vlsi | Array Processor For Image Processing Systems |
| Vision Chips: Implementing Vision Algorithms With Analog | vlsi | Circuits, Ieee Computer Society Press, Los Alamitos |
| vlsi | Algorithm For The Optimal Detection Of A Curve, A |
| vlsi | Algorithm For The Optimal Detection Of A Curve, A |
| vlsi | Algorithms And Structures For Consistent Labeling |
| vlsi | Algorithms For Solving Recurrence Equations And Applications |
| vlsi | And Modem Signal Processing (Los Angeles, Ca, November 1-3, 1982), Prentice-Hall, Englewood Cliffs |
| vlsi | Architecture For A Half-Edge-Based Corner Detector, A |
| vlsi | Architecture For A Neurocomputer Using Higher-Order Predicates, A |
| vlsi | Architecture For Computing Scale Space, A |
| vlsi | Architecture For Difference Picture-Based Dynamic Scene Analysis, A |
| vlsi | Architecture For Dynamic Time-Warp Recognition Of Handwritten Symbols |
| vlsi | Architecture For Hierarhical Scene Matching, A |
| vlsi | Architecture Of The ``Curve'' Function In Image Processing |
| vlsi | Architectures For High-Speed Range Estimation |
| vlsi | Architectures For Image Transformation |
| vlsi | Architectures For Pattern Analysis And Image Database Management |
| vlsi | Architectures For Pattern Matching |
| vlsi | Architectures For String Matching And Pattern Matching |
| vlsi | Arehitecture For Dynamic Scene Analysis, A |
| vlsi | Array Architecture For Pattern Analysis And Image Processing |
| vlsi | Curve Detector |
| vlsi | Design And Implementation Of A Real-Time Image Segmentation Processor |
| vlsi | Design Of Digital Cellular Neural Networks For Image Processing |
| vlsi | For Moment Computation And Its Applications To Breast Cancer Detection |
| vlsi | For Pattern Recognition And Image Processing, Springer |
| vlsi | Image Processing, Blackwell |
| vlsi | Implementaiton Of Systolic And 3-D Cellular Architectures For Image Processing |
| vlsi | Implementation Of A Neural Network Model |
| vlsi | Implementation Of A Real-Time Image Convolver |
| vlsi | Implementation Of An Efficient Asic Architecture For Real-Time Rotation Of Digital Images |
| vlsi | Implementation Of Pppe For Real-Time Image Processing In Radon Space-Work In Progress, A |
| vlsi | Implementation Of Real-Time Image Rotation |
| vlsi | Median Filters |
| vlsi | Multiprocessor For Image Processing |
| vlsi | Processor Architectures For Computer Vision |
| vlsi | Processor For Image Processing |
| vlsi | Pyramid Chip For Multiresolution Image Analysis, A |
| vlsi | Smart Sensor For Fast Range Imaging, A |
| vlsi | Solution To The Vertical Segment Visibility Problem, A |
| vlsi | System Architecture For High-Speed Radiative Transfer 3d Image Synthesis, A |
| vlsi | Systems For Some Problems Of Computational Geometry |
| vlsi | Systolic Architecture For Pattern Clustering, A |
| vlsi | -Based Multiprocessor For Real-Time Image Processing, A |
| Wavelet Transform-A Cmos | vlsi | Asic Implementation, The |
| Workshop On Algorithms And Parallel | vlsi | Architectures Ii, Bonas, France |
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