4.10.1.2.1 Wavelets Filters, Parallel, Hardware Implementations

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Wavelets.

Lu, J.,
Parallelizing Mallat Algorithm for 2-D Wavelet Transforms,
IPL(45), 1993, pp. 255-259. BibRef 9300

Sava, H., Fleury, M., Downton, A.C., Clark, A.F.,
Parallel Pipeline Implementation of Wavelet Transforms,
VISP(144), No. 6, December 1997, pp. 355-359. 9806
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Yu, C., Chen, S.J.,
VLSI Implementation of 2-D Discrete Wavelet Transform for Real-Time Video Signal-Processing,
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Hungenahally, S., You, J.,
Parallel Wavelet Transform over Distributed Computer Network for Real-Time Applications,
RealTimeImg(6), No. 5, October 2000, pp. 375-389. 0011
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Wu, P.C.[Po-Cheng], Chen, L.G.[Liang-Gee],
An Efficient Architecture for Two-Dimensional Discrete Wavelet Transform,
CirSysVideo(11), No. 4, April 2001, pp. 536-545.
IEEE Top Reference. 0104
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Wu, P.C.[Po-Cheng], Chen, L.G., Lai, Y.K., Tsai, T.H.,
Design Strategy for Three-Dimensional Subband Filter Banks,
ICIP96(I: 605-608).
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Feil, M.[Manfred], Uhl, A.[Andreas],
Real-Time Image Analysis Using MIMD Parallel trous Wavelet Algorithms,
RealTimeImg(7), No. 6, December 2001, pp. 483-493.
DOI Link 0202
The trous algorithm is a discrete approach to the continuous wavelet transform. BibRef

Feil, M.[Manfred], Uhl, A.[Andreas],
Wavelet Packet Image Decomposition on MIMD Architectures,
RealTimeImg(8), No. 5, October 2002, pp. 399-412.
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Dai, Q., Chen, X., Lin, C.,
A Novel VLSI Architecture for Multidimensional Discrete Wavelet Transform,
CirSysVideo(14), No. 8, August 2004, pp. 1105-1110.
IEEE Abstract. 0409
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Chen, X.[Xuyun], Zhou, T.[Ting], Zhang, Q.L.[Qian-Ling], Li, W.[Wei], Min, H.[Hao],
A VLSI architecture for discrete wavelet transform,
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Olkkonen, H., Olkkonen, J.T., Pesola, P.,
Efficient Lifting Wavelet Transform for Microprocessor and VLSI Applications,
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Masselos, K., Andreopoulos, Y., Stouraitis, T.,
Performance comparison of two-dimensional discrete wavelet transform computation schedules on a VLIW digital signal processor,
VISP(153), No. 2, April 2006, pp. 173-180.
DOI Link 0604
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Lee, S.W., Lim, S.C.,
VLSI Design of a Wavelet Processing Core,
CirSysVideo(16), No. 11, November 2006, pp. 1350-1361.
IEEE DOI 0611
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Zhang, C.H.[Chun-Hui], Long, Y.[Yun], Kurdahi, F.[Fadi],
A hierarchical pipelining architecture and FPGA implementation for lifting-based 2-D DWT,
RealTimeIP(2), No. 4, December 2007, pp. 281-291.
Springer DOI 0712
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Olkkonen, H.[Hannu], Olkkonen, J.T.[Juuso T.],
Simplified biorthogonal discrete wavelet transform for VLSI architecture design,
SIViP(2), No. 2, June 2008, pp. xx-yy.
Springer DOI 0711
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Wong, T.T.[Tien-Tsin], Leung, C.S.[Chi-Sing], Heng, P.A.[Pheng-Ann], Wang, J.Q.[Jian-Qing],
Discrete Wavelet Transform on Consumer-Level Graphics Hardware,
MultMed(9), No. 3, April 2007, pp. 668-673.
IEEE DOI 0905
BibRef

Shahbahrami, A., Juurlink, B., Vassiliadis, S.,
Implementing the 2-D Wavelet Transform on SIMD-Enhanced General-Purpose Processors,
MultMed(10), No. 1, January 2008, pp. 43-51.
IEEE DOI 0905
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Das, A., Hazra, A., Banerjee, S.,
An Efficient Architecture for 3-D Discrete Wavelet Transform,
CirSysVideo(20), No. 2, February 2010, pp. 286-296.
IEEE DOI 1003
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Wu, C.K.[Chang-Kun], Zhang, W.[Wei], Jia, Q.[Qi], Liu, Y.[Yanyan],
Hardware efficient multiplier-less multi-level 2D DWT architecture without off-chip RAM,
IET-IPR(11), No. 6, June 2017, pp. 362-369.
DOI Link 1706
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Quan, T.M.[Tran Minh], Jeong, W.K.[Won-Ki],
A fast mixed-band lifting wavelet transform on the GPU,
ICIP14(1238-1242)
IEEE DOI 1502
Discrete wavelet transforms BibRef

Wang, K.Y.[Ke-Yan], Wu, C.K.[Cheng-Ke], Liu, K.[Kai], Li, Y.S.[Yun-Song], Jeong, J.C.[Je-Chang],
Efficient Line-Based VLSI Architecture for 2-D Lifting DWT,
ICIP06(2129-2132).
IEEE DOI 0610
BibRef

Huang, C.T.[Chao-Tsung], Tseng, P.C.[Po-Chih], Chen, L.G.[Liang-Gee],
Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted,
ICIP03(II: 571-574).
IEEE DOI 0312
BibRef

Nibouche, M., Bouridane, A., Crookes, D., Nibouche, O.,
An FPGA-Based Wavelet Transforms Coprocessor,
ICIP01(III: 194-197).
IEEE DOI 0108
BibRef

Ferretti, M., Rizzo, D.,
Wavelet transform architectures: A system level review,
CIAP97(II: 77-84).
Springer DOI 9709
BibRef

Hoyt, J.D., Weschsler, H.,
The wavelet transform-a CMOS VLSI ASIC implementation,
ICPR92(IV:19-22).
IEEE DOI 9208
BibRef

Misra, M., Prasanna, V.K.,
Parallel computation of 2-D wavelet transforms,
ICPR92(IV:111-114).
IEEE DOI 9208
BibRef

Chapter on Computational Vision, Regularization, Connectionist, Morphology, Scale-Space, Perceptual Grouping, Wavelets, Color, Sensors, Optical, Laser, Radar continues in
Wavelets, Mallat Papers .


Last update:Nov 18, 2017 at 20:56:18