9.15.2 D.2. Meshes, Hypercubes, etc.

Chapter Contents (Back)

Zubair, M., Gupta, S.N.,
Embeddings On A Boolean Cube,
BIT(30), 1990, pp. 245-256. BibRef

Chean, M., Fortes, J.A.B.,
A Taxonomy Of Reconfiguration Techniques For Fault-Tolerant Processor Arrays,
COMPUTER(23), No. 1, 1990, pp. 55-69. BibRef

Ginosar, R., Egozi, D.,
Topological Comparison Of Perfect Shuffle And Hypercube,
INTL. J. PARALLEL PROCESSING(18), 1989, pp. 37-68. BibRef

Wang, B.F., Chen, G.H.,
Two Dimensional Processor Array With A Reconfigurable Bus System Is At Least As Powerful As Crcw Model,
IPL(36), 1990, pp. 31-36. BibRef

Inoue, K., Takanami, I., Nakamura, A.,
A Note On Time-Bounded Bottom-Up Pyramid Cellular Acceptors,
IS(51), 1990, pp. 121-133. BibRef

Ho, C.T., Johnsson, S.L.,
Embedding Meshes In Boolean Cubes By Graph Decomposition,
JPDC(8), 1990, pp. 325-339. BibRef

Lai, T.H., White, W.,
Mapping Pyramid Algorithms Into Hypercubes,
JPDC(9), 1990, pp. 42-54. BibRef

Hung, Y., Rosenfeld, A.,
Processing Border Codes On A Mesh-Connected Computer,
JPDC(10), 1990, pp. 18-28. BibRef

Stout, Q.F., Wagar, B.,
Intensive Hypercube Communication-Prearranged Communication In Link-Bound Machines,
JPDC(10), 1990, pp. 167-181. BibRef

Hasselbring, W.,
Celip: A Cellular Language For Image Processing,
PC(14), 1990, pp. 99-109. BibRef

Hayes, J.P., Mudge, T.,
Hypercube Supercomputers,
P-IEEE(77), 1989, pp. 1829-1841. BibRef

Potter, J.L., Meilander, W.C.,
Array Processor Supercomputers,
P-IEEE(77), 1989, pp. 1896-1914. BibRef

Siegel, H.J., Nation, W.G., Kruskal, C.P., Napolitano Jr., L.M.,
Using The Multistage Cube Network Topology In Parallel Supercomputers,
P-IEEE(77), 1989, pp. 1932-1953. BibRef

Sher, C.A., Rosenfeld, A.,
A Pyramid Programming Environment On The Connection Machine,
PRL(11), 1990, pp. 241-245. BibRef

Teeuw, W.B., Duin, R.P.W.,
An Algorithm For Benchmarking An Simd Pyramid With The Abingdon Cross,
PRL(11), 1990, pp. 501-506. BibRef

Culik III, K., Pachl, J., Yu, S.,
On The Limit Sets Of Cellular Automata,
SIAM JC(18), 1989, pp. 831-842. BibRef

Wagner, A., Corneil, D.G.,
Embedding Trees In A Hypercube Is Np-Complete,
SIAM JC(19), 1990, pp. 570-590. BibRef

Cypher, R., Sanz, J.L.C.,
Simd Architectures And Algorithms For Image Processing And Computer Vision,
T-ASSP(37), 1989, pp. 2158-2174. BibRef

Chen, M.S., Shin, K.G., Kandlur, D.D.,
Addressing, Routing, And Broadcasting In Hexagonal Mesh Multiprocessors,
T-COMP(39), 1990, pp. 10-18. BibRef

Matic, S.,
Emulation Of Hypercube Architecture On Nearest-Neighbor Mesh-Connected Processing Elements,
T-COMP(39), 1990, pp. 698-700. BibRef

Melhem, R.G., Hwang, G.Y.,
Embedding Rectangular Grids Into Square Grids With Dilation Two,
T-COMP(39), 1990, pp. 1446-1455. BibRef

Milgram, M., de Saint Pierre, T.,
Boundary Detection And Skeletonization With A Massively Parallel Architecture,
T-PAMI(12), 1990, pp. 74-78. BibRef

Ibarra, O.H., Sohn, S.M.,
On Mapping Systolic Algorithms Onto The Hypercube,
T-PDS(1), 1990, pp. 48-63. BibRef

Ranka, S., Sahni, S.,
Odd Even Shifts In Simd Hypercubes,
T-PDS(1), 1990, pp. 77-82. BibRef

Klein, J.C., Collange, F., Bilodeau, M.,
A Bit Plane Architecture For An Image Analysis Processor Implemented With P.L.C.A. Gate Array,
ECCV(90), pp. 33-49. BibRef

Haddadi, N., Hwang, K., Chellappa, R.,
Viscom: An Orthogonal Multiprocessor For Early Vision And Neural Computing,
ICPR-D(90), pp. 265-271. BibRef

Tremblay, M., Poussart, D.,
Mar: An Integrated System For Focal Plane Edge Tracking With Parallel Analog Processing And Built-In Primitives For Image Acquisition And Analysis,
ICPR-D(90), pp. 292-298. BibRef

Davis, L.S., Chen, L.T., Narayanan, P.J.,
Connection Machine Vision-Replicated Data Structures,
ICPR-D(90), pp. 299-304. BibRef

Sunwoo, M.H., Aggarwal, J.K.,
A Sliding Memory Plane Array Processor For Low Level Vision,
ICPR-D(90), pp. 312-317. BibRef

Raghavan, R., Jung, K.K., Nguyen, H.T.,
Fine Grain Parallel Processors And Real-Time Applications: Mimd Controller/Simd Array,
ICPR-D(90), pp. 324-331. BibRef

Barman, R., Bolotski, M., Camporese, D., Little, J.J.,
Silt: The Bit-Parallel Approach,
ICPR-D(90), pp. 332-336. BibRef

Alnuweiri, H.M., Prasanna Kumar, V.K.,
Optimal Image Algorithms On An Orthogonally-Connected Memory-Based Architecture,
ICPR-D(90), pp. 350-355. BibRef

Gerogiannis, D.C., Orphanoudakis, S.C.,
Efficient Embedding Of Interprocessor Communications In Parallel Implementations Of Intermediate Level Vision Tasks,
ICPR-D(90), pp. 369-372. BibRef

Herbordt, M.C., Weems, C.C., Shu, D.B.,
Routing On The Caapp,
ICPR-D(90), pp. 467-471. BibRef

Rana, D., Weems, C.C.,
The Iua Feedback Concentrator,
ICPR-D(90), pp. 540-544. BibRef

Vorhees, H., Fritzsche, D.M., Tucker, L.W.,
Exploiting Data Parallelism In Vision On The Connection Machine System,
ICPR-D(90), pp. 617-622. BibRef

Nudd, G.R., Atherton, T.J., Francis, N.D., Howarth, R.M., Kerbyson, D.J., Packwood, R.A., Vaudin, G.J.,
A Hierarchical Multiple-Simd Architecture For Image Analysis,
ICPR-D(90), pp. 642-647. BibRef

Duff, M.J.B., Fountain, T.J.,
Enhancing The Two-Dimensional Mesh,
ICPR-D(90), pp. 654-659. BibRef

Herbordt, M.C., Weems, C.C., Shu, D.B.,
General Routing On The Lowest Level Of The Image Understanding Architecture,
IUW(90), pp. 797-804. BibRef

Chen, L.T., Davis, L.S.,
A Parallel Algorithm For List Ranking Image Curves In O(Logn) Time,
IUW(90), pp. 805-815. BibRef

Chapter on Rosenfeld Bibliography for 1990 continues in
D.3. Other Systems .

Last update:Jun 7, 2018 at 10:14:50