20.2 Real-Time Systems, Architecture, Hardware Issues for Vision

Chapter Contents (Back)
Hardware.

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Chai, S.[Sek], Kisacanin, B.[Branislav], Bellas, N.[Nikolaos],
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Musil, P., Juránek, R., Musil, M., Zemcík, P.,
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CirSysVideo(30), No. 1, January 2020, pp. 267-280.
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IEEE DOI 2003
Field programmable gate arrays, Feature extraction, Throughput, Graphics processing units, Histograms, Central Processing Unit, GPUs BibRef

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3DV22(322-331)
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DynamicISP: Dynamically Controlled Image Signal Processor for Image Recognition,
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Ganji, D.C.[Darshan C.], Ashfaq, S.[Saad], Saboori, E.[Ehsan], Sah, S.[Sudhakar], Mitra, S.[Saptarshi], AskariHemmat, M.[MohammadHossein], Hoffman, A.[Alexander], Hassanien, A.[Ahmed], Léonardon, M.[Mathieu],
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ECV23(4656-4664)
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Datta, G.[Gourav], Liu, Z.[Zeyu], Yin, Z.H.[Zi-Han], Sun, L.Y.[Lin-Yu], Jaiswal, A.R.[Akhilesh R.], Beerel, P.A.[Peter A.],
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WACV23(2429-2438)
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CVPR22(10945-10954)
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Training, Costs, Computational modeling, Scalability, Predictive models, Multitasking, Dynamic scheduling, Vision applications and systems BibRef

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ISCV22(1-7)
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WACV22(3461-3470)
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Robots, Navigation, Artificial intelligence, Task analysis, Computational modeling, Visualization, Training BibRef

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ICCV19(9338-9346)
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ICIP19(4624-4628)
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Image signal processors, convolutional neural networks BibRef

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WSSIP16(1-4)
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IVCNZ13(196-201)
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Schmidradler, D., Dyck, W., Furst, K., and Hufnagel, H.,
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van Inge, A., Hertzberger, L.O.,
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Chapter on Implementations and Applications, Databases, QBIC, Video Analysis, Hardware and Software, Inspection continues in
Systems and Architectures for Image Processing .


Last update:Nov 26, 2024 at 16:40:19